MOS chip design engineer

Job Description:

1. Responsible for device design and process simulation of new power devices such as MOS transistors;

2. Participate in new product design or product upgrade design;

3. Be able to develop a reasonable project plan and complete it on time and with quality according to scientific and rigorous design standards and processes;

4. Can guide layout engineers to jointly complete layout work;

5. Improve project development process, maintain technical documentation, and optimize project definition, design, simulation, layout, and other inspection standards;

Qualification:

1. Bachelor's degree or above, major in microelectronics/electronic engineering/electronic science, etc;

2. Familiar with the product development process of MOSFET and other power semiconductors, with priority given to those with experience in MOSFET and other power device product development;

3. Having practical experience in operating semiconductor component simulation software and layout software, familiar with layout design and device simulation;

4. More than 2 years of experience in power MOSFET design, covering shielded gate/discrete gate (SGT) MOSFET or super junction MOSFET design;

5. Can provide empirical evidence to demonstrate that the designed product has international competitiveness;

6. Have an attitude and determination to be proactive, willing to accept challenges, understand the problem, and quickly solve it;

7. Experience in process integration, product engineering, or chip factory technology development is preferred.

8. Familiar with SMIC technology, with priority given to relevant chip channel resources.

MOS transistor layout design engineer

Job Description

1. Design a forward simulation layout based on the route

2. Complete DRC, LVS, ERC validation

Job requirements:

1. Bachelor's degree or above in chip design, microelectronics, electronic engineering, or related fields

2. Familiar with the process flow and basic circuit knowledge of power devices such as MOS transistors

3. Understand knowledge related to forward simulation layout, such as matching, noise, parasitism, etc

4. Understand antenna effects, Latch_up, and ESD circuits

5. Proficient in using EDA software such as Virtuoso and Calibre

6. Diligent in work, patient, proactive, with a certain level of stress resistance, good communication and team collaboration skills